Mask Layout Designer, Markham
Mask Layout Designer, Markham
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Markham, Canada
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Publiée: il y a moins d’une semaine
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Description
General Summary
Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.High School diploma or equivalent and 8+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. 4+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap). Preferred Qualifications
Master's degree in Technology, Electrical Engineering, Electronic Engineering, or related field. 6+ years of experience designing custom layouts in a specific relevant technology (e.g., FINFET, CMOS, GATE ARRAY). 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design).2+ years in a technical leadership role with or without direct reports. 3+ years of work experience in a role requiring interaction with senior leadership (e.g., Sr Director level and above). 1+ year of working with operating budgets and/or project financials. 1+ year in a leadership role with direct reports (applies only to those with direct reports).Principal Duties and Responsibilities
Leads team to read and develop highly complex project requirements and specifications; interprets schematics to understand macro level layout design needs. Leads team to define and build macro level layouts and floorplans based on in-depth understanding of layout techniques, design elements, requirements (e.g., PPA, yield), and electronic principles (e.g., currents, resistance, parasitic).Develops and communicates guidelines, processes, design rule manuals, and checklists across teams; identifies and recommends improvements to guidelines and manuals to facilitate high-quality, accurate designs that meet standards. Manages the testing and validation of top-level designs against specifications using layout and verification tools (e.g., Cadence, LVS, rmap) to identify errors and ensure layouts can be built by manufacturing.Provides guidance on gathering information and conducts advanced analyses and sign‑off to identify where an issue has occurred; helps team troubleshoot and debug complex technical issues. Develops new ways to accomplish work and/or improves or automates existing methods to increase efficiencies for the team; helps others to learn new approaches.Displays deep knowledge of industry trends and developments related to mask layout tools and techniques; integrates advancements into one's work and helps team do the same. Re‑scopes projects, identifies and reassigns resources, and reviews the work of team members in order to address changing timelines or priorities.Leads management of team project priorities, deadlines, and deliverables for mid‑ to large‑sized projects; leads multiple projects. Collaborates closely with key internal teams (e.g., Engineers, Program Management, and Business Operations) and external stakeholders (e.g., PVERF, PDCAD, QDA, Foundry, SoC) to identify needs, share updates, and resolve complex issues in a timely manner.Level of Responsibility
Works independently with little supervision. Provides supervision to direct reports. Decisions are moderate in nature. Errors are detected and corrected with relatively minor financial impact or effect on projects, operations, or customer relationships. May require involvement beyond immediate work group to correct.Requires verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. Role may require strong negotiation and influence, communication to large groups or high‑level constituents. Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework. Substantial creativity is needed to innovate new processes, procedures, or work products within guidelines or to achieve established objectives.Deductive and inductive problem solving is required; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required. Occasionally participates in strategic planning within own area affecting immediate operations.The responsibilities of this role do not include
Does not have financial accountability. Applicants and Equal Opportunity Statement
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.Pay range and Other Compensation&Benefits
Pay range: $45.58 - $68.36 (per hour). In addition to the base salary, qualified candidates are eligible for a competitive annual discretionary bonus program and opportunity for annual RSU grants. Employees on sales‑incentive plans are not eligible for the annual bonus. Our benefits package includes competitive health, dental, vision, life insurance, and other supplemental benefits supporting success at work, at home, and in personal life.
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Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.High School diploma or equivalent and 8+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. 4+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap). Preferred Qualifications
Master's degree in Technology, Electrical Engineering, Electronic Engineering, or related field. 6+ years of experience designing custom layouts in a specific relevant technology (e.g., FINFET, CMOS, GATE ARRAY). 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design).2+ years in a technical leadership role with or without direct reports. 3+ years of work experience in a role requiring interaction with senior leadership (e.g., Sr Director level and above). 1+ year of working with operating budgets and/or project financials. 1+ year in a leadership role with direct reports (applies only to those with direct reports).Principal Duties and Responsibilities
Leads team to read and develop highly complex project requirements and specifications; interprets schematics to understand macro level layout design needs. Leads team to define and build macro level layouts and floorplans based on in-depth understanding of layout techniques, design elements, requirements (e.g., PPA, yield), and electronic principles (e.g., currents, resistance, parasitic).Develops and communicates guidelines, processes, design rule manuals, and checklists across teams; identifies and recommends improvements to guidelines and manuals to facilitate high-quality, accurate designs that meet standards. Manages the testing and validation of top-level designs against specifications using layout and verification tools (e.g., Cadence, LVS, rmap) to identify errors and ensure layouts can be built by manufacturing.Provides guidance on gathering information and conducts advanced analyses and sign‑off to identify where an issue has occurred; helps team troubleshoot and debug complex technical issues. Develops new ways to accomplish work and/or improves or automates existing methods to increase efficiencies for the team; helps others to learn new approaches.Displays deep knowledge of industry trends and developments related to mask layout tools and techniques; integrates advancements into one's work and helps team do the same. Re‑scopes projects, identifies and reassigns resources, and reviews the work of team members in order to address changing timelines or priorities.Leads management of team project priorities, deadlines, and deliverables for mid‑ to large‑sized projects; leads multiple projects. Collaborates closely with key internal teams (e.g., Engineers, Program Management, and Business Operations) and external stakeholders (e.g., PVERF, PDCAD, QDA, Foundry, SoC) to identify needs, share updates, and resolve complex issues in a timely manner.Level of Responsibility
Works independently with little supervision. Provides supervision to direct reports. Decisions are moderate in nature. Errors are detected and corrected with relatively minor financial impact or effect on projects, operations, or customer relationships. May require involvement beyond immediate work group to correct.Requires verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. Role may require strong negotiation and influence, communication to large groups or high‑level constituents. Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework. Substantial creativity is needed to innovate new processes, procedures, or work products within guidelines or to achieve established objectives.Deductive and inductive problem solving is required; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required. Occasionally participates in strategic planning within own area affecting immediate operations.The responsibilities of this role do not include
Does not have financial accountability. Applicants and Equal Opportunity Statement
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.Pay range and Other Compensation&Benefits
Pay range: $45.58 - $68.36 (per hour). In addition to the base salary, qualified candidates are eligible for a competitive annual discretionary bonus program and opportunity for annual RSU grants. Employees on sales‑incentive plans are not eligible for the annual bonus. Our benefits package includes competitive health, dental, vision, life insurance, and other supplemental benefits supporting success at work, at home, and in personal life.
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Informations clefs
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Nom de l’entrepriseQualcomm
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Titre de posteMask Layout Designer
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Mask Layout Designer est visible sur Locanto dans la rubrique Markham Design, Conception.
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