SOC Design Engineer, Markham

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE: An RTL design and integration role in our System on Chip (SoC) design team, where numerous subsystems and IP cores are integrated to produce high performance SoC products. Our designers work on SoC level RTL design, block level RTL design, and/or subsystem level integration for a variety of SoC products. Your expertise will be deployed in SoC ASIC projects targeting networking, security, storage, and other applications.

THE PERSON: You are an experienced RTL designer who has a passion for modern digital ASIC design. You are a team player who has excellent written and verbal communication skills with experience collaborating across multiple design sites and time zones. You have strong analytical and problem-solving skills and enjoy tackling new challenges. You pay attention to details. You enjoy working amongst a multi-disciplinary team of professionals with diverse skills and experiences to complete projects in an efficient manner.

KEY RESPONSIBILITIES

Develop and maintain SoC and subsystems synthesizable RTL, design methodology and infrastructure

Collaborate directly with IP Architecture, SoC Architecture and Design Leads

Debug and resolve issues with SoC Integration, SoC Design Verification and post-silicon validation teams

Work with IP development teams and Physical Design (PD) team to meet SoC Power/Performance/Area goals by providing synthesis and timing closure support

Resolve SoC simulation regression failures through close collaboration with SoC Verification Team and working with Verification Team members to ensure achievement of verification quality metrics

Support the activities of the Emulation Team

Attend and contribute to regular technical status meetings

PREFERRED EXPERIENCE

Experienced RTL (Verilog / System Verilog) ASIC design experience through implementations targeting leading edge ASIC technologies

Proven experience with industry-leading ASIC design tools, synthesis tools, flows, and timing closure

Experience executing design checks such as lint, CDC, and LEC using industry standard ASIC tools

Familiarity with industry standard power flows

Proficient with scripting languages such as Python, Perl, TCL, Makefile, and csh/bash

Skilled in simulation and debugging with functional verification tools from Synopsys, Cadence, and/or Siemens (Mentor) including Gate-level simulations

Industry experience with ASIC SoC design and integration

Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)

Experience in modern, complex networking architecture and digital design in general

Familiarity with networking protocols (such as Ethernet) and standards for digital communication systems, optical communications, and packet processing applications

Familiarity with encryption protocols (such as MACsec and IPsec) and security technologies for digital communication systems

ACADEMIC CREDENTIALS Bachelors or Masters degree in Computer/Electrical Engineering

LOCATION: Markham, ON; Ottawa, ON a possibility

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

#J-18808-Ljbffr