Silicon Design Engineer (1 year contract), Markham
Silicon Design Engineer (1 year contract), Markham
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Markham I3P, Canada
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Dernière édition le: il y a moins d’une semaine
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Description
What You Do at AMD At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.
About The Department Central DFX (CDFX) is a centralized ASIC design group within AMD’s Technology and Engineering organization. CDFX has a global footprint with design teams located in several AMD offices in North America and Asia. Our mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD)features for complex state-of-the-art APU computing, game console and GPU graphics products. It is also responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD.
The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem‑solving skills and are willing to learn and ready to take on problems.
Key Responsibilities
Understand Design-for-Test (DFT) architecture
Implement and deploy automated design flows to implement DFT features in a complex SOC ASIC design or IP subsystem
Setup and execute design checks using both industry standard and in-house tools
Deliver Perl, python, TCL scripts that provide scalable solutions key to DFT implementation
Monitor CAD and/or IP regression results, debug failures and analyze coverage
Develop in-house automation, utilities, intranet web portal, AI/ML applications
Preferred Experience
Experience with Perl/Python/Shell scripting, C++, SQL
Experience with AI/ML application
Good object oriented programming skills
Digital circuits and VLSI knowledge
Strong problem solving skills
Good written and oral communication skills
Team player with strong interpersonal skills
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering
Benefits Benefits offered are described: AMD benefits at a glance.
Equal Opportunity Employer AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
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About The Department Central DFX (CDFX) is a centralized ASIC design group within AMD’s Technology and Engineering organization. CDFX has a global footprint with design teams located in several AMD offices in North America and Asia. Our mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD)features for complex state-of-the-art APU computing, game console and GPU graphics products. It is also responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD.
The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem‑solving skills and are willing to learn and ready to take on problems.
Key Responsibilities
Understand Design-for-Test (DFT) architecture
Implement and deploy automated design flows to implement DFT features in a complex SOC ASIC design or IP subsystem
Setup and execute design checks using both industry standard and in-house tools
Deliver Perl, python, TCL scripts that provide scalable solutions key to DFT implementation
Monitor CAD and/or IP regression results, debug failures and analyze coverage
Develop in-house automation, utilities, intranet web portal, AI/ML applications
Preferred Experience
Experience with Perl/Python/Shell scripting, C++, SQL
Experience with AI/ML application
Good object oriented programming skills
Digital circuits and VLSI knowledge
Strong problem solving skills
Good written and oral communication skills
Team player with strong interpersonal skills
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering
Benefits Benefits offered are described: AMD benefits at a glance.
Equal Opportunity Employer AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
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Informations clefs
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Nom de l’entrepriseAMD
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Titre de posteSilicon Design Engineer (1 year contract)
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